Fingerprint Fingerprint is based on mining the text of the person's scientific documents to create an index of weighted terms, which defines the key subjects of each individual researcher.

  • 22 Similar Profiles
Calibration Engineering & Materials Science
Digital to analog conversion Engineering & Materials Science
Capacitors Engineering & Materials Science
Clocks Engineering & Materials Science
Modulators Engineering & Materials Science
Networks (circuits) Engineering & Materials Science
Sampling Engineering & Materials Science
Electric potential Engineering & Materials Science

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Research Output 1998 2017

  • 1087 Citations
  • 14 h-Index
  • 41 Conference contribution
  • 28 Article
  • 1 Chapter

28.4 A 12b 330MS/s pipelined-SAR ADC with PVT-stabilized dynamic amplifier achieving <1dB SNDR variation

Huang, H., Sarkar, S., Elies, B. & Chiu, Y. Mar 2 2017 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 60, p. 472-473 2 p. 7870466

Research output: ResearchConference contribution

Operational amplifiers
Calibration
Electric potential
Bias currents
Transconductance

28.6 A 78.5dB-SNDR radiation- and metastability-tolerant two-step split SAR ADC operating up to 75MS/s with 24.9mW power consumption in 65nm CMOS

Xu, H., Cai, Y., Du, L., Zhou, Y., Xu, B., Gong, D., Ye, J. & Chiu, Y. Mar 2 2017 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 60, p. 476-477 2 p. 7870468

Research output: ResearchConference contribution

Electric power utilization
Radiation
High energy physics
Argon
Calorimeters

A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS

Xu, B., Zhou, Y. & Chiu, Y. Jan 23 2017 (Accepted/In press) In : IEEE Journal of Solid-State Circuits.

Research output: Research - peer-reviewArticle

Digital to analog conversion
Electric potential
Electric delay lines
Crosstalk
Pipelines
1 Citations

Application of a Quantum-Well Silicon NMOS Transistor as a Folding Amplifier Frequency Multiplier

Naquin, C., Cai, Y., Hu, G., Lee, M., Chiu, Y., Edwards, H., Mathur, G., Chatterjee, T. & Maggio, K. May 1 2017 In : IEEE Journal of the Electron Devices Society. 5, 3, p. 224-231 8 p., 7852491

Research output: Research - peer-reviewArticle

Frequency multiplying circuits
Silicon
Semiconductor quantum wells
Transistors
Equipment and Supplies
6 Citations

15.1 A 24.7mW 45MHz-BW 75.3dB-SNDR SAR-assisted CT ΔΣ modulator with 2nd-order noise coupling in 65nm CMOS

Wu, B., Zhu, S., Xu, B. & Chiu, Y. Feb 23 2016 Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., Vol. 59, p. 270-271 2 p. 7418011

Research output: ResearchConference contribution

Modulators
Capacitors
Bandwidth
Compensation and Redress
Throughput